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Common exam pitfall
Students often forget to invert the NAND output when computing intermediate node Q.
Work from inputs towards the output. Label intermediate wires so you can evaluate one gate at a time.
Worked row
The circuit means X = A AND B, Y = NOT C, Q = X OR Y. For A=1,B=0,C=1, X=0 and Y=0, so Q=0. For A=1,B=1,C=1, X=1 and Y=0, so Q=1.
The expression is (A AND B) OR (NOT C). Parentheses preserve the intended structure. To build a truth table, list all eight combinations of A,B,C and add columns for X,Y,Q. Evaluate each column in dependency order.
Independent construction
A fan should run when Hot AND Occupied are both 1, or when Manual is 1. Draw the circuit on paper, then write its expression and complete its truth table. Keep the gates corresponding to the stated rule; do not simplify away part of the required representation.
Self-review: use one AND feeding one OR; Hot and Occupied enter AND, Manual enters the other OR input. There are three inputs and one output. Check the row Hot=0,Occupied=1,Manual=1: the output must be 1.
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Exam-Style Check: Tracing Combinational Circuit Intermediate Signals
• Multiple ChoiceA combinational logic circuit processes three binary inputs $A = 0$, $B = 1$, and $C = 1$ through three logic gates:
- Intermediate node $P = A \text{ OR } B$ (Gate 1: OR)
- Intermediate node $Q = \text{NOT }(B \text{ AND } C)$ (Gate 2: NAND)
- Final output $X = P \text{ AND } Q$ (Gate 3: AND)
What are the resulting binary values at nodes $P$, $Q$, and final output $X$?
Interactive exercises for Module 2 and beyond require an active plan.