Hardware & Software Interrupts

If a processor had to continuously check whether a key was pressed, whether the printer needed paper, or whether a network packet had arrived, it would waste billions of clock cycles doing nothing but asking devices for their status (polling).

Instead, modern computers use interrupts, allowing the CPU to execute user programs at full speed while responding to external events immediately when they occur.

Learning Objectives

• Define an interrupt and describe the difference between polling and interrupt-driven processing.
• Compare and give examples of Hardware Interrupts and Software Interrupts.
• Trace the step-by-step interrupt handling lifecycle using the Interrupt Service Routine (ISR) and the stack.
• Explain how interrupt priorities resolve simultaneous requests.

What Is an Interrupt?

An interrupt is a signal sent to the Central Processing Unit by a hardware device or a software application requesting immediate processor service.

Polling vs Interrupts

• Polling: The CPU repeatedly asks every peripheral device in turn: "Do you need service?". Extremely wasteful of CPU clock cycles.
• Interrupt-Driven: The CPU continues executing its main workload. When a device requires service, it asserts an electrical signal on the Control Bus, grabbing the CPU's attention only when necessary.

Hardware vs Software Interrupts

+-------------------+
                       |    INTERRUPTS     |
                       +-------------------+
                                 |
        +------------------------+------------------------+
        |                                                 |
        v                                                 v
  [ HARDWARE INTERRUPTS ]                           [ SOFTWARE INTERRUPTS ]
  Generated by physical devices                     Generated by executing code
  - Keyboard keypress                               - Division by zero error
  - Mouse movement / click                          - Stack overflow
  - Printer out of paper / ink                      - Segmentation fault (invalid RAM)
  - Hard drive read completion                      - System call (requesting OS file read)
  - Power failure warning (UPS)
  - Hardware timer expiration

1. Hardware Interrupts

• Initiated by physical components external to the CPU core.
• Signals travel along dedicated interrupt request (IRQ) lines on the Control Bus.
• Examples:
• A user types a letter on the keyboard.
• A network interface card (NIC) finishes receiving an Ethernet packet.
• A hard disk completes moving its read/write head and has data ready in its buffer.
• Power supply sensor detects an imminent electrical drop (power-fail interrupt).

2. Software Interrupts

• Generated by software instructions currently running on the CPU.
• Often referred to as exceptions or traps.
• Examples:
• Arithmetic Exceptions: A mathematical error occurs, such as an attempt to divide a number by zero.
• Memory Violations: A program attempts to access an address outside its permitted RAM allocation (segmentation fault).
• System Calls: An application asks the operating system kernel to perform a privileged task, such as opening a file or drawing a window.

The Interrupt Handling Lifecycle

When an interrupt signal arrives, the CPU handles it systematically to ensure no user data is lost:

[ Normal FDE Execution ]
          |
          v (Interrupt signal detected on Control Bus)
[ Finish Current Instruction ]
          |
          v
[ Check Priority vs Current Task ]
          | (If higher priority)
          v
[ Push Registers onto the STACK ]  (Saves PC, ACC, Status Flags)
          |
          v
[ Load PC with ISR Address ]
          |
          v
[ Execute the Interrupt Service Routine (ISR) ]
          |
          v (ISR completes)
[ Pop Saved Registers from STACK ]  (Restores PC and ACC)
          |
          v
[ Resume Normal Program at Saved PC ]

Step-by-Step Sequence:

1. Instruction Completion: The CPU does not abort midway through an instruction; it allows the current FDE cycle instruction in flight to finish executing.
2. Priority Evaluation: The CPU checks the priority of the incoming interrupt against its current task. If the interrupt has a higher priority, the CPU proceeds to service it.
3. Context Preservation (The Stack):

• The contents of all active CPU registers—including the Program Counter (PC), Accumulator (ACC), and Status Flags—are pushed onto a special Last-In, First-Out (LIFO) memory structure called the stack.
• This ensures the CPU remembers the exact state of the interrupted program.

1. Loading the ISR:

• The CPU uses an Interrupt Vector Table to look up the memory address of the specific Interrupt Service Routine (ISR) associated with that interrupt.
• The address of the ISR is loaded into the Program Counter (PC).

1. Executing the ISR:

• The CPU runs the ISR code to service the event (e.g. read the key code from the keyboard buffer and store it in RAM).

1. Context Restoration & Resumption:

• When the ISR completes, the saved register states are popped off the stack and restored to the CPU registers.
• The restored Program Counter points to the next instruction of the original program.
• The CPU seamlessly resumes executing the original program without any data corruption.

Written practice and self-review

Interrupts allow a CPU to handle asynchronous external events without wasting clock cycles polling hardware.

1. Distinguish between a hardware interrupt and a software interrupt, giving two distinct examples of each.
2. Explain why saving register contents onto the stack is vital before executing an Interrupt Service Routine (ISR), and describe how the original program resumes.

Write an explanation before checking the theory. Check that each claim answers the question, uses the correct concept and explains why it applies. Discuss uncertain points with a teacher. The structured exercise below checks specific facts; it does not automatically mark this explanation.