Parity Blocks

2D Parity Blocks (Matrix Parity)

A 2D Parity Block (also called horizontal and vertical parity) can locate and correct an assumed single-bit error and detect many, but not all, multiple-bit errors.

How a Parity Block Works:

1. Data is transmitted as a block of multiple bytes arranged in a table (grid).
2. Horizontal Parity: Each individual byte (row) contains its own parity bit.
3. Vertical Parity: An entire extra byte (the Parity Byte) is calculated and appended at the bottom, containing a parity bit for each column.

Worked Example: Even Parity Block

Suppose 4 bytes of data are transmitted using Even Parity:

Col 7  Col 6  Col 5  Col 4  Col 3  Col 2  Col 1  [Parity Bit]   Row Parity Status
Byte 1:        1      0      1      1      0      0      1          0        -> 4 ones (Valid Even)
Byte 2:        0      1      1      0      1      1      0          0        -> 4 ones (Valid Even)
Byte 3:        1      1      0      1      0      0      0          1        -> 4 ones (Valid Even)
Byte 4:        0      0      1      1      1      0      1          0        -> 4 ones (Valid Even)
-------------------------------------------------------------------------
Parity Byte:   0      0      1      1      0      1      0          1        -> Column Parity

Detecting and Correcting a Flipped Bit

Suppose during transmission, electrical noise flips Row 2, Column 5 from 1 to 0:

Col 7  Col 6  Col 5  Col 4  Col 3  Col 2  Col 1  [Parity Bit]
Byte 1:        1      0      1      1      0      0      1          0       -> OK
Byte 2:        0      1     [0]     0      1      1      0          0       -> ERROR! (3 ones)
Byte 3:        1      1      0      1      0      0      0          1       -> OK
Byte 4:        0      0      1      1      1      0      1          0       -> OK
-------------------------------------------------------------------------
Parity Byte:   0      0      1      1      0      1      0          1
               OK     OK   ERROR!   OK     OK     OK     OK        OK

1. Row Check: Row 2 now has three 1s instead of an even number $\implies$ Row 2 has an error.
2. Column Check: Column 5 now has three 1s instead of four, including its parity bit $\implies$ Column 5 has an error.
3. Intersection: The intersection of Row 2 and Column 5 identifies the exact erroneous bit.
4. Correction: The receiver inverts the bit from 0 back to 1. The data is restored to pristine accuracy without requesting a slow network retransmission!

Limits and independent practice

Always count the parity bit when checking a row or column. An odd result where even parity is required indicates a mismatch. With an assumed single-bit error, the failed row and column identify its location. If four corners of a rectangle flip, each affected row and column changes twice and the errors can remain undetected. Do not claim arbitrary multi-bit correction.