CAMBRIDGE IGCSE 0478
Module 3
Section 3: Hardware & Architecture
Von Neumann CPU architecture, registers (PC, MAR, MDR, CIR, ACC), the Fetch-Decode-Execute (FDE) cycle, CPU cores/cache/clock speed, instruction sets, embedded systems, input/output peripherals, sensors, primary RAM/ROM, and secondary magnetic/optical/SSD storage technologies.
16 lessons
•
210 mins total
Module Lessons
16 lessons
0
3.0 Module Overview: Hardware
5 mins
•
Open Theory
1
CPU Architecture & Von Neumann Architecture
15 mins
•
Open Theory
2
The Fetch-Decode-Execute (FDE) Cycle
15 mins
•
Open Theory
3
CPU Performance Factors
15 mins
•
Open Theory
4
Instruction Sets & Machine Code
15 mins
•
Open Theory
5
Embedded Systems
10 mins
•
Open Theory
6
Input Devices
15 mins
•
Open Theory
7
Touchscreen Technologies
15 mins
•
Open Theory
8
Sensors in Context
10 mins
•
Open Theory
9
Output Devices & Actuators
15 mins
•
Open Theory
10
Printing Technologies
10 mins
•
Open Theory
11
Primary Storage: RAM, ROM & Virtual Memory
15 mins
•
Open Theory
12
Secondary Storage Technologies
15 mins
•
Open Theory
13
Cloud and Local Storage
10 mins
•
Open Theory
14
Network Hardware and Addresses
10 mins
•
Open Theory
15
Mixed Practice: Hardware
20 mins
•
Open Theory